CyberSecBulletin
CVE-2024-21823NVD status: Deferred

Intel(R) DSA and Intel(R) IAA for some…: Hardware Logic with Insecure De-Synchronization between Control and Data Channels

CVE-2024-21823 is a high-severity hardware logic with insecure de-synchronization between control and data channels vulnerability in Intel(R) DSA and Intel(R) IAA for some Intel(R) 4th or 5th generation Xeon(R) processors, with a CVSS 3.1 base score of 7.5 out of 10. It can be exploited with local access to the system by an attacker with a low-privileged account, without any action from a user. Affected Intel(R) DSA and Intel(R) IAA for some Intel(R) 4th or 5th generation Xeon(R) processors versions: See references. The record does not name a fixed version, so check the vendor advisory. There is no confirmed exploitation so far. EPSS estimates a 0.2% chance of exploitation within 30 days, which is low compared with other CVEs.

Next patch cycle

High severity with no evidence of exploitation so far.

What to do

  1. Check which version of Intel(R) DSA and Intel(R) IAA for some Intel(R) 4th or 5th generation Xeon(R) processors you run against the affected versions below, and install the vendor's latest release.

Affected products and versions

Version data comes from the organisation that assigned the CVE. Confirm against the vendor advisory before deciding you are unaffected.

How the severity score breaks down

Attack vector
LocalThe attacker needs local access or must trick a user into running something.
Attack complexity
HighSuccess depends on conditions outside the attacker's control.
Privileges required
LowA basic user account is enough.
User interaction
NoneNo action by a victim is required.
Scope
ChangedThe attack can reach beyond the vulnerable component into other systems.
Confidentiality
NoneNo data is disclosed.
Integrity
HighData or code can be modified at will.
Availability
HighThe component can be taken down completely.

Vector: CVSS:3.1/AV:L/AC:H/PR:L/UI:N/S:C/C:N/I:H/A:H. Scored by CNA (intel.com).

Official description

Hardware logic with insecure de-synchronization in Intel(R) DSA and Intel(R) IAA for some Intel(R) 4th or 5th generation Xeon(R) processors may allow an authorized user to potentially enable escalation of privilege local access

Source: the CVE record as published by its numbering authority, via NVD and CVE.org.

The underlying weakness: Hardware Logic with Insecure De-Synchronization between Control and Data Channels

The hardware logic for error handling and security checks can incorrectly forward data before the security check is complete.

How developers prevent this class of flaw

  • Thoroughly verify the data routing logic to ensure that any error handling or security checks effectively block illegal dataflows.

More Hardware Logic with Insecure De-Synchronization between Control and Data Channels vulnerabilities (CWE-1264)

Timeline

  1. CVE record published.
  2. CISA published its SSVC assessment (exploitation: none, automatable: no, technical impact: partial).
  3. Record last changed materially (score, affected products, status or references).

References

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