Security-Sensitive Hardware Controls with Missing Lock Bit Protection
CWE-1233
The product uses a register lock bit protection mechanism, but it does not ensure that the lock bit prevents modification of system registers or controls that perform changes to important hardware system configuration.
We track 2 vulnerabilities of this type. 100% are rated high or critical, and the average CVSS score is 8.6.
How this weakness is prevented
- Architecture and Design Implementation Testing: Security lock bit protections must be reviewed for design inconsistency and common weaknesses. Security lock programming flow and lock properties must be tested in pre-silicon and post-silicon testing.
Latest Security-Sensitive Hardware Controls with Missing Lock Bit Protection vulnerabilities
- 8.5 High severity
AMD EPYC™ 9004 Series Processors: Security-Sensitive Hardware Controls with Missing Lock Bit Protection
Missing lock bit protection for NBIO registers could allow a local admin-privileged attacker to gain arbitrary System Management Network (SMN) access, potentially resulting in arbitrary code execution in AMD Secure Processor (ASP) and loss of the SEV-SNP guest
- 8.7 High severity
Universal Flash Storage: Improper Synchronization
Western Digital has identified a weakness in the UFS standard that could result in a security vulnerability. This vulnerability may exist in some systems where the Host boot ROM code implements the UFS Boot feature to boot from UFS compliant storage devices. T