CyberSecBulletin

On-Chip Debug and Test Interface With Improper Access Control

CWE-1191

The chip does not implement or does not correctly perform access control to check whether users are authorized to access internal registers and test modes through the physical debug/test interface.

If authorization, authentication, or some other form of access control is not implemented or not implemented correctly, a user may be able to bypass on-chip protection mechanisms through the debug interface.

We track 10 vulnerabilities of this type. 100% are rated high or critical, and the average CVSS score is 8.1.

How this weakness is prevented

  • Architecture and Design: If feasible, the manufacturer should disable the JTAG interface or implement authentication and authorization for the JTAG interface. If authentication logic is added, it should be resistant to timing attacks. Security-sensitive data stored in registers, such as keys, etc. should be cleared when entering debug mode.

Latest On-Chip Debug and Test Interface With Improper Access Control vulnerabilities