Improper Handling of Overlap Between Protected Memory Ranges
CWE-1260
The product allows address regions to overlap, which can result in the bypassing of intended memory protection.
Isolated memory regions and access control (read/write) policies are used by hardware to protect privileged software. Software components are often allowed to change or remap memory region definitions in order to enable flexible and dynamically changeable memory management by system software.
We track 4 vulnerabilities of this type. 100% are rated high or critical, and the average CVSS score is 8.3.
How this weakness is prevented
- Architecture and Design: Ensure that memory regions are isolated as intended and that access control (read/write) policies are used by hardware to protect privileged software.
Latest Improper Handling of Overlap Between Protected Memory Ranges vulnerabilities
- 7.9 High severity
Intel(R) Xeon(R) 6 processor with Intel(R) TDX: Improper Handling of Overlap Between Protected Memory Ranges
Improper handling of overlap between protected memory ranges for some Intel(R) Xeon(R) 6 processor with Intel(R) TDX may allow a privileged user to potentially enable escalation of privilege via local access.
- 7.5 High severity
Firefox: Improper Handling of Overlap Between Protected Memory Ranges
Memory safety bugs present in Firefox 135, Thunderbird 135, Firefox ESR 115.20, Firefox ESR 128.7, and Thunderbird 128.7. Some of these bugs showed evidence of memory corruption and we presume that with enough effort some of these could have been exploited to
- 9.8 Critical severity
Firefox: Improper Handling of Overlap Between Protected Memory Ranges
Memory safety bugs present in Firefox 125. Some of these bugs showed evidence of memory corruption and we presume that with enough effort some of these could have been exploited to run arbitrary code. This vulnerability affects Firefox < 126.
- 8.2 High severity
Mobile Radio: Improper Handling of Overlap Between Protected Memory Ranges
Motorola MTM5000 series firmwares lack properly configured memory protection of pages shared between the OMAP-L138 ARM and DSP cores. The SoC provides two memory protection units, MPU1 and MPU2, to enforce the trust boundary between the two cores. Since both u